Bit
|
Attr
|
Reset Value
|
Description
|
7
|
RW
|
0x0
|
ACS
Automatic Pad/CRC Stripping
When this bit is set, the GMAC strips the Pad/FCS field on incoming frames only if the length's field value is less than or equal to 1,500 bytes. All received frames with length field greater than or equal to 1,501 bytes are passed to the application without stripping the Pad/FCS field.
When this bit is reset, the GMAC will pass all
incoming frames to the Host unmodified.
|
6:5
|
RW
|
0x0
|
BL
Back-Off Limit
The Back-Off limit determines the random integer number (r) of slot time delays (4,096 bit times for 1000 Mbps and 512 bit times for 10/100 Mbps) the GMAC waits before rescheduling a transmission attempt during retries after a collision. This bit is applicable only to Half-Duplex mode and is reserved (RO) in Full-Duplex-only configuration.
2'b00: k = min (n, 10) 2'b01: k = min (n, 8)
2'b10: k = min (n, 4)
2'b11: k = min (n, 1),
where n = retransmission attempt. The random integer r takes the value in the range 0 = r < 2^k
|
Only
T-chip
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