Performance, Energy and Thermal Considerations of smt and cmp architectures Yingmin LI, David Brooks, Zhigang Hu, Kevin Skadron


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Performance, Energy and Thermal Considerations of SMT and CMP architectures

  • Yingmin Li, David Brooks, Zhigang Hu, Kevin Skadron

  • Dept. of Computer Science, University of Virginia

  • Division of Engineering and Applied Sciences, Havard University

  • IBM T.J.Watson Research Center


Motivation

  • Future trend calls for multi-core and multi-thread architectures

  • Which is better: lots of tiny speed demons or fewer brainiacs?

  • Which is more valuable, more L2 or additional cores?

  • Performance, power, and thermal properties of multi-core vs. multi-thread architectures not well understood



Scope of this Study

  • Equal-area comparison between SMT vs. CMP extensions of an Apple G5-like core

  • Note: 1MB L2 roughly equals to 1 G5 like Core

  • in terms of area



Outline

  • Modeling / Model Validation

  • SMT vs. CMP performance, power and thermal analysis (without DTM)

  • SMT vs. CMP performance, power and thermal analysis (with DTM)

  • Conclusions and future work



Performance sensitivity with different L2 size



Modeling and Validation

  • Performance: Turandot with SMT and CMP augmentations, validated against Power4 preRTL model

  • Power: PowerTimer with SMT and CMP augmentations, validated against CPAM power data extracted from circuit

  • Temperature: Hotspot from UVA integrated with Turandot/PowerTimer, validated with test chips at UVA





Hotspot temperature model



Peak Temperature of The Hottest Spot for SMT and CMP



Heat Flow of Global Heat-up



Illustration (global heat-up of CMP vs. local heat-up of SMT)



Temperature Trend with technology evolution



SMT vs. CMP performance and power efficiency analysis (without DTM)



The impact of changing L2 size: Examples



SMT vs. CMP performance with DTM



SMT energy efficiency with DTM



CMP energy efficiency with DTM



Conclusions

  • With the same chip area, SMT performs better than CMP for memory bound benchmarks while CMP performs better than SMT for non memory bound benchmarks with Apple G5 like architecture.

  • The thermal heating effects are quite different for CMP and SMT

  • CMP machines are clearly hotter than SMT machines with leaky technology

  • Different DTM technique favors different architecture



Future Work

  • Consider significantly larger amounts of thread-level parallelism and hybrids between CMP and SMT cores

  • The impact of varying core complexity on the performance of SMT and CMP, and explore a wider range of design options, like SMT fetch policies.

  • Explore server-oriented workloads



ST energy efficiency with DTM



Is maximum temperature a good metric for thermal efficiency?



Temperature variation of architectural units with DTM applied



Motivation




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