Ўзбекскистон алоқа ва ахборотлаштириш агентстлиги

Modellashtirish

Ushbu laboratoriya ishi doirasida xulq-atvorni modellashtirish ISE paketiga o'rnatilgan ISE simulation tizimi yordamida amalga oshiriladi. Modellashtirish mux_unit loyiha moduli uchun amalga oshiriladi (10 -rasm).
1. Sources dan mux_unit modulini tanlang (13 -rasm). 2 Project menyusidan New Source -ni tanlang.

3. 
   New source Wizard oynasida (14 -rasm) yaratilgan mux_unit_tb faylining nomini vaTest Bench WaveForm fayl turini ko'rsating. Next tugmasini bosing.
   

27.13-rasm. Xulq -atvor modellashtirish uchun modul tanlash

27.14-rasm. Xulq -atvor modellashtirish uchun modul yaratish

3. 
   Associate Source oynasida (27.15 -rasm) mux_unit modulini belgilang va
   

Next bosing.

15–rasm. Modellashtirish moduli assotsiatsiyasi muloqot oynasi

3. 
   Summary oynasi paydo bo'ladi. Finish tugmasini bosing.
   
4. 
   Initial Timing and Clock Wizard ishga tushadi. 16-rasmda ko'rsatilganidek, barcha parametrlarni o'rnating.Finish tugmasini bosing
   

27.16-rasm. Vaqtinchalik parametrlarni ishga tushirish uchun dialog paneli Vaqtinchalik diagrammalarni muharrirlash oynasi paydo bo'ladi (27.17 -rasm).
27.17-rasm. Sinov signallarini yaratish oynasi
8. "mux_unit" modulining kirish signali bo'lgan "Sel" signalining vaqt diagrammasida (27.18-rasm) sichqoncha kursorini 20 nsgacha bo'lgan zonaga

joylashtiring, sichqonchaning o'ng tugmachasini bosing va "Set Value" buyrug'ini belgilang.

27.18-rasm. "Sel" signalining vaqt diagrammasida

Loyihani amalga oshirish jarayoni tugagandan so'ng, xabar oynasida (Konsol yorlig'i) quyidagi xabar ko'rsatiladi: Process "Generate Programming File"completed successfully (27.19 -rasm). Lab1.bit fayli yaratiladi (bit kengaytmasi FPGA oilasining FPGAlari uchun amal qiladi).

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