The pic16F84 Microcontroller Part 3 Timer

The PIC16F84 Microcontroller Part 3

Timer

Most MCUs have facilities to either measure elapsed time and/or to generate digital on/off waveforms with well defined durations. This is normally based around one or more counters that are incremented either from an external pulse or internal clock. For instance, if an automatic packing machine needs to count cans of beans going along a conveyer belt, then a photoelectric-based transducer could act as the timer input. If a new packing carton needed to be in place every 24 cans then an internal 8-bit counter would be set to E8h (-24). When the counter overflows from FFh to 00h then an interrupt would be generated and the MCU then take the appropriate action.
All PIC MCUs have at least a basic timer/counter known as Timer0 (TMR0). The read/write TMR0 counter register at File 1 can be clocked from the outside world via the T0CKI (Timer 0 ClocK In) pin, which is shared with the RA4 Port A pin. Alternatively, the incrementing source can be the internal Q4 phase clock, which is one quarter of the crystal frequency. For example, for a 4 MHz crystal this is 1 MHz. Either clock source can be frequency divided by a buried 8-bit prescale counter. This divide ratio is controlled by the lower three PreScale bits of the OPTION_REG register at File 81 h (see Fig. 13.2), labelled PS2:PS1:PS0. The ratio is then 2PS+1. For example, if PS [2 : 0] = 111 then the counter will increment at ^fg, where f is the clock source frequency. The prescaler can be disconnected by setting bit 3 of OPTION_REG to 1. This will give a direct connection between pulse source and counter. Writing to the Timer 0 register also zeros the Prescaler counter (for example movlw 0F8h, movwf 1) enabling the time period to begin from true zero time.
When this PSA (Pre-Scale Assignment) bit is 1 the prescaler becomes a postscaler to the Watchdog timer.The Watchdog timer is designed to reset the MCU unless periodically preset by the user’s program with the instruction clrwdt (CLeaR WatchDog Timer). This ensures that the PIC will eventually reset if due to an electrical disturbance or a software bug, the processor malfunctions, perhaps by jumping into an unprogrammed part of the Program store. This will disrupt the periodic preset. If the prescaler is assigned to the Timer then the Watchdog timer will periodically time-out (count down through zero) after approximately 18 ms.21 With PSA set to 1 then 2PS 18 ms Watchdog time-outs are required before the processor is reset. Thus, with PS[2 : 0] = 111, 27 = 128 time-outs gives a period to MCU reset of nominally 2.3 s. Thus the software must use the clrwdt instruction before this period elapses to prevent reset. This instruction also clears the Prescale counter. If it does time-out, then the TO bit in the Status register will be cleared. If desired the Watchdog timer may be disabled at the same time as code is programmed into the Program store. Various configuration bits (known as fuses) are located by the flash EEPROM programmer in location File 2007h (see Fig. 10.5 ), which is not accessible during the normal run mode. Such details are normally hidden to the operator by the EEPROM programmer’s operative software. Registers relating to Timer 0 are:

TMR0, File 1

Sometimes known as the Real-Time Clock/Counter (RTCC), is an 8-bit up-counter register that keeps tally of clock events. It may be preset to any byte value by moving data from W and read at any time. When it overflows from FFh to 00h it sets the T0IF (Timer0 Interrupt Flag) in the INTCON (INterrupT CONtrol) register.This maybe used to generate an interrupt.

OPTION_REG, File 81 h

Six bits in this register in Bank 1 at File 81 h are used in conjunction with the timer.
• PS2, PS1, PS0 at bits 2,1,0 respectively control the prescale ratio 2PS-1 for the timer or postscale ratio 2PS for the Watchdog timer.
• T0SE (Timer 0 Set Edge) at bit 4 allows the programmer to select which edge of a pulse at the T0CKI pin will increment the counter; a 0 for _/ and 1 for .
• T0CS (Timer 0 Clock Select) at bit 5 allows the programmer to select the clock source as either the internal clock (= 0) or a transition at the T0CKI pin.
The remaining two bits configure external interrupt edge select and electrical properties of Port B inputs.

Data EEPROM