Chapter 41 gmac ethernet Interface


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Bit

Attr

Reset Value

Description

7:6


RW


0x0


PCF
Pass Control Frames
These bits control the forwarding of all control frames (including unicast and multicast PAUSE frames). Note that the processing of PAUSE control frames depends only on RFE of Register GMAC_FLOW_CTRL[2].
2'b00: GMAC filters all control frames from reaching the application.
2'b01: GMAC forwards all control frames except PAUSE control frames to application even if they fail the Address filter.
2'b10: GMAC forwards all control frames to application even if they fail the Address Filter. 2'b11: GMAC forwards control frames that
pass the Address Filter.

5

RW

0x0

DBF
Disable Broadcast Frames
When this bit is set, the AFM module filters all incoming broadcast frames.
When this bit is reset, the AFM module passes
all received broadcast frames.

4


RW


0x0


PM
Pass All Multicast
When set, this bit indicates that all received frames with a multicast destination address (first bit in the destination address field is '1') are passed.
When reset, filtering of multicast frame
depends on HMC bit.

3


RW


0x0


DAIF
DA Inverse Filtering
When this bit is set, the Address Check block operates in inverse filtering mode for the DA address comparison for both unicast and multicast frames.
When reset, normal filtering of frames is
performed.





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